Litho R&D Engineer
Functieomschrijving
- Implementing and optimizing overlay control strategies and modeling to ensure the precise alignment of multiple layers and back side alignment during the lithography development process on both 193 immersion DUV and low NA & High NA EUV lithography
- Collaborating with researchers & process engineers to develop the High Order Correction to achieve tighter overlay control and higher process yield in cutting edge device development such as CFET.
- Cross-functional Collaboration: Working closely with other engineering teams, such as integration, etch, CMP to ensure the successful integration of overlay control into the overall semiconductor manufacturing process.
- Monitoring overlay performance on a regular basis and analyzing data to identify trends and potential issues. Analyzing process data to identify areas for improvement and implementing solutions to enhance overlay performance. Generating regular reports on overlay performance and presenting findings to management and other stakeholders.
- Troubleshooting and resolving any issues related to overlay measurement tools with Metro group and Tool Supplier
- Define the standard designs for overlay targets and the best know methods for standard overlay metrology.
Profiel
- You have a PhD in Chemistry, Physics, Chemical Engineering or Materials Science, or Master degree in similar field with at least 5 years relevant experience in semiconductor R&D environment .
- You have experience with semiconductor processing and working in a cleanroom.
- Experience with advanced lithography (193nm immersion/EUV) is a plus.
- You are well organized and eager to learn.
- You have good technical problem-solving skills and are comfortable with multitasking.
- You are an excellent communicator and have good reporting skills.
- You are fluent in English.
Aanbod
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